Digital Design Jobs Jobs - Find the most exclusive Digital Design Jobs in India

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Digital Design(Backend) Jobs in Greater Noida

Hands on experience with multiple tape-outs: Person should have thorough knowledge of flooplan, clock tree implementation, P R, low-power design implementation techniques, IR drop analysis, Sign-off Timing analysis and physical verification. He should know Cadence, Mentor and/or Synopsys tools...

Updated: 2012-Jul-28 12:48 PM

Industry: IT Products, SemiconductorRole: Backend Design

Experience Level: 4.0 to 8.0 yrsLocation: Greater Noida (India)

Employer: Digital Design

Keywords: Backend IR Drop P &R Floorplan Floorplan Floorplan

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Digital ASIC Design Jobs

The job involves: a. Micro-architecture and RTL b. Synthesis and equivalence checks (low power Flow) c. DFT ATPG d. STA and Timing closure e. Interaction with the RTL / PD team to achieve area, timing and power goals

Updated: 2012-Jul-18 01:03 AM

Industry: SemiconductorRole: Front-end digital ASIC design

Experience Level: 4.0 to 7.0 yrsLocation: Greater Noida (India)

Employer: ASIC DESIGN

Keywords: ASIC implementation Synthesis DFT and STA

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Jobs for Back end Designer

hands on experience with multiple tape-outs should have thorough knowledge of flooplan, clock tree implementation, P R, low-power He should know Cadence, Mentor and/or Synopsys tools for above skills. Person should be able to independently execute functional as well as timing ECOs on the design.

Updated: 2012-Aug-17 05:27 PM

Industry: SemiconductorRole: Back end Designer

Experience Level: 4.0 to 8.0 yrsLocation: Greter Noida (India)

Employer: Digital Design

Keywords: multiple tape-outs Cadence SOC projects

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Digital Designer Jobs

Digital IP design [Specification to RTL to Digital Flow till Synthesis and post silicon support]

Updated: 2012-Aug-11 05:30 AM

Industry: SemiconductorRole: Digital Designer

Experience Level: 2.0 to 4.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: Digital Designer Digital IP design Timing Analysis

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Digital Designer Jobs

Responsible for Design Support of digital part of the PHY SubSystem for High Speed Serial Link, i.e., usb2, Ethernet, with Controller, Bus adaptor etc.

Updated: 2012-Aug-10 05:58 PM

Industry: SemiconductorRole: Digital Designer

Experience Level: 4.0 to 8.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: RTL Digital Designer

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Jobs for Digital Designer

Design Support of digital part of the PHY SubSystem for High Speed Serial Link, i.e., usb2, Ethernet, with Controller, Bus adaptor etc.

Updated: 2012-Jul-25 12:17 PM

Industry: SemiconductorRole: Digital Designer

Experience Level: 4.0 to 8.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: Ethernet Synthesys tools RTL design

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Non-Volatile Memory design (NVM) Jobs

Strong fundamentals of MOS based circuit design. Sound fundamentals in analog/mixed-signal circuit design. Hands-on experience Exposure in some/all of the following areas - Op-Amps , Regulators, Current Voltage References, Sense-Amplifier, Mixed Signal design – Memory Blocks, Charge-pump,...

Updated: 2012-Jul-20 09:45 AM

Industry: SemiconductorRole: Non-Volatile Memory design

Experience Level: 1.0 to 5.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: Non-Volatile Memory design SPICE simulators Digital-Analog blocks

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Digital Designer Jobs

Design Support of digital part of the PHY SubSystem for High Speed Serial Link, i.e., usb2, Ethernet, with Controller, Bus adaptor etc.

Updated: 2012-Jul-18 05:44 PM

Industry: SemiconductorRole: Digital Designer

Experience Level: 4.0 to 8.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: RTL design SubSystem digital Simulation

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Digital Designer (Back End) Jobs @ Greater Noida

Experience in flooplan, clock tree implementation, P R, low-power design implementation techniques, IR drop analysis, Sign-off Timing analysis and physical verification. Knowledge of Cadence, Mentor and/or Synopsys tools for above skills. Person should be able to independently execute functional...

Updated: 2012-Jul-18 01:03 AM

Industry: SemiconductorRole: Digital Designer (Back End)

Experience Level: 3.0 to 8.0 yrsLocation: Greater Noida (India)

Employer: Digital Design

Keywords: flooplan clock tree implementation low-power design

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Jobs for Front End Flow

Understanding of basic ASIC design flow. Person should be self starter and willing to learn new tools/flows using various CAD flows/ tools from vendors.

Updated: 2012-Jul-18 01:03 AM

Industry: SemiconductorRole: FE Flow position

Experience Level: 2.0 to 4.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: SOC integration SynthesisCAD flows TA Encounter.

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Jobs for Front End

Person should be able to independently execute functional as well as timing ECOs on the design. He should have worked on atleast couple of 40nm and beyond technology node tape-outs. Person very strong in technical reporting and willing to excel his/her career in technical domains participating...

Updated: 2012-Jul-18 01:03 AM

Industry: SemiconductorRole: Front End

Experience Level: 4.0 to 8.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: Synthesis design constraints Formality Hand-off DFT insertion trenta and/or Cadence tools

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Front End Jobs

He should have worked on atleast couple of 40nm and beyond technology node tape-outs. Person very strong in technical reporting and willing to excel his/her career in technical domains participatingin challenging and strong deadline driven multi-domain SOC projects on latest technology.

Updated: 2012-Jul-18 01:03 AM

Industry: SemiconductorRole: Front End

Experience Level: 4.0 to 8.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: Synthesis design constraints 40nm timing analysis. Formality Hand-off DFT insertion

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Jobs for Front End Flow

Person should be self starter and willing to learn new tools/flows using various CAD flows/ tools from vendors.

Updated: 2012-Jul-18 01:03 AM

Industry: SemiconductorRole: Front End Flow

Experience Level: 2.0 to 4.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: SOC integration Synthesis TA Encounter. TCL PERL and/or JAVA ASIC design

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Back End Jobs

Person should be able to independently execute functional as well as timing ECOs on the design. He should have worked on atleast couple of 40nm and beyond technology node tape-outs. Person very strong in technical reporting and willing to excel his/her career in technical domains participating...

Updated: 2012-Jul-18 01:03 AM

Role: Back End

Experience Level: 4.0 to 8.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: Back End flooplan clock tree implementation40nm Cadence Mentor

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Jobs for RTL Design (Subsystem)

Design Support of digital part of the PHY SubSystem for High Speed Serial Link, i.e., usb2, Ethernet, with Controller, Bus adaptor etc.

Updated: 2012-Jul-18 01:03 AM

Industry: SemiconductorRole: Subsystem

Experience Level: 4.0 to 8.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: Synthesys tools. digital Simulation Verifications RTL design

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Jobs for Memory Layout

#Understanding of key SRAM blocks #Knowledgeable in design rule analysis, parasitic extraction, noise crosstalk issues, yield improvement and manufacturability issues and design for test principles

Updated: 2012-Jul-18 01:03 AM

Industry: SemiconductorRole: Memory Layout

Experience Level: 2.0 to 4.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: Memory Layout Layout Tiling SRAM blocks CMOS fundamentals

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Digital Designer Jobs

Responsible for Design Support of digital part of the PHY SubSystem for High Speed Serial Link, i.e., usb2, Ethernet, with Controller, Bus adaptor etc.

Updated: 2012-Jul-18 01:03 AM

Industry: SemiconductorRole: Digital Designer

Experience Level: 4.0 to 8.0 yrsLocation: Noida (India)

Employer: Digital Design

Keywords: RTL Digital Design

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Jobs Digital Verification

Verification

Updated: 2012-Jul-30 05:45 PM

Industry: Semiconductor

Experience Level: 9.0 to 10.0 yrsLocation: Bangalore (India)

Employer: Design Verification

Keywords: System Verilog

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Jobs Digital Verification

Verification

Updated: 2012-Jul-30 05:45 PM

Industry: Semiconductor

Experience Level: 8.0 to 9.0 yrsLocation: Bangalore (India)

Employer: Design Verification

Keywords: System Verilog

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Jobs Lead Digital Verification

Verification

Updated: 2012-Jul-30 05:45 PM

Industry: Semiconductor

Experience Level: 7.0 to 8.0 yrsLocation: Bangalore (India)

Employer: Design Verification

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